C
Principal Design Validation & Test (DVT) Engineer
Celero Communications, Inc.
حضوريتصميم
من الإعلان الأصلي
Irvine, CA About The Role Celero is seeking an experienced Principal Design Validation & Test (DVT) Engineer to lead post-silicon validation for next-generation coherent DSP ASICs powering AI and hyperscale optical networking. As a key member of our engineering team, you will play a critical role in enabling first silicon, driving silicon characterization, and ensuring product readiness for customer deployment and high-volume production. This is a highly visible technical leadership role within a fast-paced startup where you will work closely with Architecture, RTL Design, Firmware, Systems,…
مقتطف من نص الإعلان الأصلي (الإنجليزية). التفاصيل الكاملة عند صاحب العمل.معرض وظائف لا يوظّف ولا يمثّل صاحب العمل. تفاصيل الإعلان الأصلي هي المرجع.