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Silicon Photonics Wafer Level Packaging Design Engineer (f/m/d)
Scantinel GmbH
On-siteDesign
From the original posting
Ulm Scantinel Engineering Deine Aufgaben Design and develop wafer level packaging solutions, 2D/2.5D/3D, for advanced silicon photonics platforms Create and optimise metallisation layouts (e.g. UBM, RDL, Solder, TSVs) to meet electrical, mechanical and manufacturing requirements. Define and engineer package mechanical features, including die interfaces, alignment structures, stress management and assembly tolerances. Perform thermal modelling and analysis to optimise heat dissipation, thermal resistance and package reliability across operating conditions. Develop and execute package…
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