Physical Design Timing Engineer

From the original posting

Mountain View, CA About the role Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out. What you'll do Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon. Use and develop AI-assisted tool flows to accelerate physical design timing convergence and signoff timelines. What we're looking for Exceptional abilities across the full physical design flow (synthesis, place & route, CTS,…