Senior RTL Design Engineer

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Sunnyvale, CA Responsibilities: • Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators. • Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design. • Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans. • Work with physical implementation team to implement and optimize physical design to meet frequency, area, power goals. • Collaborate with…